Online Digital Electronics Test

Please explain all the questions orderly

Your Answer

setup time;  The minimum  time required before the clock edge data must be stable,
holdtime;     The minimum time required after the clock edge data must be stable this is hold time .
  the setup time and hold time violations occur at unknown asynchronous input come to  the edge clock this violations are occur.
This problem overcome by one synchronous FLIP FLOP will be connect to the current fashion.


49+01=50 
in the binary result  is 0011_0010

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